As we wirelessly connect more and more devices to the internet, electronics engineers face several challenges, including how to package a radio transmitter into their existing device real estate and how to make increasingly smaller devices. They’re also striving to meet consumer demand for Internet of Things (IoT) products that are ergonomically easy to use and un-obtrusive to the environment.
Size expectation is one of the most frequently asked questions when considering IoT devices, along with radio performance and price. Ideally, engineers would like to use IoT components that are as small as possible, have great RF performance, and are affordable. These characteristics do not typically converge in IoT component offerings, and that presents a challenge for solution providers.
Fortunately, the size of a silicon die has been getting smaller and smaller over the years as the industry adopts new silicon manufacturing processes. The industry has been solving the space issue for IoT implementations by combining the MCU and RF front end into system-on-chip (SoC) configurations (i.e. making wireless MCUs available.) However, the trend toward SoCs has not solved the physics of the RF transmitter — the antenna. Antenna design is often left for a customer to sort out, or they may be guided to choose ready-to-use wireless modules with an integrated antenna. The space required for an antenna is a challenge that comes with designing small IoT devices. It needs to be efficient, while also enabling reliable wireless connections. For this reason, the following section highlights the specific concerns around antenna integration.
Why a SoC?
When the first IoT boom started to blossom during the 2000s, the industry was called machine-to-machine (M2M), and the components offered for IoT connectivity were mainly GPRS modems, Bluetooth® serial cable replacement, or Sub-G proprietary radios. These designs had two main components for connectivity: the MCU and the radio modem. And the required space for basic IoT functionality was typically at its smallest — 50 mm on each dimension — meaning the devices where about the size of a mobile phone.
When the silicon industry moved to processes where the required MCU and RF functionality could be packaged into the same die space, new possibilities for developers began to emerge. Now they could implement the functionality of an IoT device in same IC/SoC. The IoT component architectures shifted to wireless MCUs due the obvious benefits— engineers could design IoT devices with a single component and save significant space, but they could also save money because of the lower component costs. When selecting the architecture for modern IoT devices, it’s obvious that the SoC based systems will lead the way thanks to their size advantage.
What about the antenna? How much space?
The new era of highly integrated SoCs leaves developers with some questions: What about the antenna? How much space I should reserve for the antenna? What kind of antenna I should choose, or should I use a module with the antenna already integrated? The antenna question is complex at many levels as we need to consider not only size and efficiency but detuning questions as well, especially across designs that may have different housings but the same antenna architecture.
It has been common to use PCB trace antennas, such as inverted-F, for IoT designs due their low bill of material (BoM) costs. But these printed PCB antennas have significant size requirements, normally in the range of 25 mm x 15 mm, ultimately making the resulting IoT devices enormous. These antennas have another downside if used in a module as well: They are sensitive to the detuning caused by the housing materials and require specific consideration in the end product assembly to work optimally. In SoC designs, antenna tuning is part of the normal design flow and requires a certain amount\ of expertise. In these designs, a printed antenna does not differ from other antenna types.
The antenna manufacturers have been offering ‘chip antennas’ for quite some time to simplify design efforts, but there are size benefits as well. These chip antennas are offered mainly in two different forms:
Antennas that are not coupled to the GND plane and will require a relatively large clearance area (or that is free from the ground, traces, and components). Examples of such antennas are monopole and inverted –F type antennas.
Antennas that are coupled to the GND plane and require either a relatively small clearance area beneath the antenna or don’t require clearance area at all.
Both of these antenna types have space requirements on clearance area and/or ground plane and PCB size. The required space for the RF part of an IoT design should also include the needed clearance area because no components or traces can be placed here. This means that when designers are doing size estimations for IoT devices, they need to pay attention to the necessary PCB dimensions for the antenna and the needed clearance areas, but they also need separation distances from the antenna with the edge of the housing.
When making IoT designs the size of a coin cell battery, there is always an compromise with antenna efficiency. The smaller size we try to achieve, the less efficiency we can have for the RF performance. Devices less than 10 mm on each dimension begin to achieve performance in the 2.4 GHz band, giving users Bluetooth connectivity of approximately 10 metres with a mobile phone, which is acceptable for most personal IoT devices.
However, when the dimensions are closer to 20 mm in each direction, the efficiency of RF increases significantly, giving practical range of 20–40 metres with a mobile phone depending on the conditions. When dimensions reach 40 mm, the optimum efficiency of several antennas that tune with the ground plane size reach maximum performance. This means with the Bluetooth 4.2 protocol, a practical range between two identical devices is around 60–400 metres. When using 15.4 protocols such as ZigBee®, the range can be up to +500 metres in line of sight. So depending on the application and size targets, a designer needs to look at the antenna performance and efficiency in relation to PCB size, as most of the chip antennas use the PCB ground plane as part of the antenna configuration. In addition, the position of the antenna/module in the design is important, and designers need to consider the clearance areas, grounding for the optimum location of the module in the design.
What about the external antenna?
According to statistics of Bluegiga modules in the design pipeline, for several different antenna packaging options, nearly 50 per cent of IoT customers evaluate the performance and feasibility of external antenna (antennas integrated into the housing example via U.FL connector). However, approximately only 10 per cent of these evaluated designs deploy the external antenna, and 90 per cent of the customers choose modules with a built-in chip antenna. What is the reason behind this? Why would engineers not widely deploy external antennas on their designs? The answer to this question has two main dimensions. Firstly, the mechanics of external antenna at the design is not design friendly; they look ugly and they break easily if the IoT device is dropped. These antennas also significantly increase the BoM and assembly costs. Also, when comparing the efficiency of the well-built RF design with chip antenna vs external antenna usage through a U.FL antenna connector, there is not a benefit to using an external antenna. The benefit of the external antenna is obvious if the housing of the device is metallic, forming a Faraday cage that makes it impossible for the RF signals to penetrate the device. Also, if the absolute best performance is required and assembly costs and mechanical designs allow for the usage of an external antenna.
How packed should the housing be?
When engineering the IoT device with an antenna, the mechanics and housing play an important role in avoiding or causing antenna detuning. The RF radiation, when bursting out of the antenna, is impacted by the proximity of the materials. The antenna will detune if it touches the metal or even plastic. For this reason, the antenna needs to be separated from physical contact with housing plastic or metals. There are big differences in the types of antennas and their sensitivity to detuning. Monopole-type antennas are more sensitive than GND coupled antennas. Some of the latest packaging innovations of Silicon Labs’ SiP module solve the detuning issue because the antenna is already within the substrate and detuned to the proximity of the plastic housing. This sets designers free to place the SiP module freely on their designs, reducing the size of the devices significantly.
Possibilities of System in Package (SiP)
Silicon Labs has combined its IoT SoC experience with Bluegiga antenna design experience by creating a SiP module that offers the benefits of a SoC module combined with an ultrasmall footprint. The total design footprint size, including the antenna clearance area, is slightly over 50 mm2. This means that it leaves space for other components in the design, finally making it feasible to design truly compact IoT devices.
The BGM12x SiP modules are designed for the smallest design footprint for Bluetooth low energy technology. Its 6.5 x 6.5 size offers complete implementation and includes an ARM® Cortex™- M4F core-based MCU, plenty of flash and RAM, an integrated antenna, and an ultra-small clearance area of 5.0 mm x 3.0 mm to enable high-performance applications. The SiP module also integrates all required passive components in practice, leaving the designer free from all RF-related designs worries if layout guidelines are followed. The SiP modules are ideal for wearables and home automation systems, and where the design of end devices needs to be slim and small, such as sports and fitness devices and wearables.
Best practices for size optimisation with SiP
Use a SiP based on an SoC with flash-based architecture for protocol updates and maintenance.
Use highly integrated and small SiP modules with small PCB clearance areas.
Use highly integrated SiP modules with antennas that do not detune in proximity of the housing.
Precisely follow given layout guidelines. Pay attention to the precision of clearance area size, SiP module positioning, and distance from PCB edges. ☐